Computer architecture and the fetch–decode–execute cycle

Learning objectives

Describe the role of the central processing unit in carrying out instructions, and describe the von Neumann model in which instructions and data share the same memory

State the purpose of the arithmetic logic unit, the control unit, the program counter, the memory address register, the memory data register, the current instruction register and the accumulator

Explain the purpose of the address bus, the data bus and the control bus, and state which of them carries signals in one direction only

Describe each stage of the fetch–decode–execute cycle, naming the registers used at each stage as a single instruction is carried out

Explain how cache size, clock speed and the number of cores each affect the performance of a central processing unit, and state what is meant by an instruction set

Describe an embedded system as hardware and software built into a larger device for one dedicated purpose, giving examples such as a washing machine, a set-top box and a vending machine